The biggest drawback of the PDP is its large consumption of power. In order to reduce the amount of power consumed by the PDP, it is necessary to enhance its illumination efficiency and to minimize the unnecessary use of power (not directly related to discharge) that occurs during the drive process.
The AC PDP utilizes surface discharge occurring on a surface of a dielectric substance that is deposited on electrodes. In the AC PDP, in order to perform sustain discharge of tens of thousands to several millions of cells, a drive pulse has a few tens of volts to a few hundred volts [V], and its frequency is a few hundred kilohertz [kHz] and higher. If such a drive pulse, is applied to within the cells, charge/discharge of a high electric capacity occurs.
When charge/discharge occurs in this manner in the PDP, although there is no energy consumption by only the capacity load of the panel, there is significant energy loss in the PDP since the drive pulse is generated using DC power. In particular, if an excessive current flows in the cells during discharge, an even greater energy loss occurs. This energy loss causes an increase in the temperature of switch elements, and, in the worst case, the switch elements may be destroyed by such a temperature increase. An energy recovery circuit is included in a drive circuit of the PDP to recover the energy unnecessarily generated in the panel.
FIG. 1 is a circuit diagram of a conventional energy recovery circuit. With reference to FIG. 1, an energy recovery circuit disclosed by Weber (U.S. Pat. No. 5,081,400) includes first and second switches SW1 and SW2 connected in parallel between an external capacitor Css and inductor L, a third switch SW3 for supplying a sustain voltage Vs to a panel capacitor Cp, and a fourth switch SW4 for supplying a ground voltage GND to the panel capacitor Cp.
First and second diodes D1 and D2 are connected in series between the first and second switches SW1 and SW2, and act to prevent the flow of reverse current. The panel capacitor Cp equivalently exhibits the value of electrostatic capacity of the panel. Semiconductor switch devices are used for the switches SW1, SW2, SW3, and SW4. For example, MOSFETs (metal oxide semiconductor field effect transistors) may be used for the switches SW1, SW2, SW3, and SW4.
FIG. 2 shows timing diagrams of the switches SW1, SW2, SW3, and SW4, and graphs of a voltage Vp applied to one end of the panel capacitor Cp and of a current IL flowing through the inductor L during charge/discharge. The capacitor Cp, the inductor L, and the switches SW1, SW2, SW3, and SW4 are those appearing in the energy recovery circuit of FIG. 1.
If it is assumed that a voltage equal to one half the sustain voltage Vs (i.e., Vs/2) is charged to the external capacitor Css, the energy recovery circuit of FIG. 1 may be described in connection with FIG. 2 as follows.
During an interval T1, if the first switch SW1 is turned on and the second, third, and fourth switches SW2, SW3, and SW4 turned off, a voltage stored in the external capacitor Css passes through the first switch SW1 and the first diode D1 to be supplied to the inductor L. As a result, the inductor L and the panel capacitor Cp form an LC series resonance circuit such that the panel capacitor Cp is charged with a voltage by a resonance waveform. The voltage charged to the panel capacitor Cp is increased until reaching the sustain voltage Vs. A positive resonance current IL flowing through the inductor L increases from 0 to a predetermined level according to the increase in voltage, then again is reduced to 0.
During an interval T2, if the first switch SW1 is turned off, the third switch SW3 turned on, and the second and fourth switches SW2 and SW4 left in their off states, the sustain voltage (Vcc=Vs) passes through the third switch SW3 to be supplied to the panel capacitor Cp. The voltage applied to one end of the panel capacitor Cp maintains the sustain voltage.
During an interval T3, if the third switch SW3 is turned off, the second switch SW2 turned on, and the first and fourth switches SW1 and SW4 left in their off states, the voltage charged in the panel capacitor Cp passes through the inductor L, the second diode D2, and the second switch SW2 such that the energy is recovered by the external capacitor Css. The voltage applied to one end of the panel capacitor Cp at this time is reduced from the sustain voltage Vs to 0. Further, a negative resonance current IL flowing through the inductor L increases starting from 0 until reaching a predetermined level, then again drops to 0 according to the reduction in voltage.
In an interval T4, if the second switch SW2 is turned of, the fourth switch SW4 turned on, and the first and third switches SW1 and SW3 left in their off states, the panel capacitor Cp maintains a ground voltage GND.
In the conventional energy recovery circuit described above, since the panel capacitor is charged by natural LC resonance, the amount of time it takes to charge the panel capacitor is increased. Further, since a relatively large sustain voltage is supplied to the panel capacitor, power consumption is increased.